Microelectronics Research Center
791 Atlantic Drive, Room 261
Atlanta, Georgia 30332
Tel: 404.894.4829
Email: azad@gatech.edu
Professor Naeemi received his B.S. degree in electrical engineering from Sharif University, Tehran, Iran in 1994, and his M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, Ga. in 2001 and 2003, respectively.
Dr. Naeemi's research crosses the boundaries of materials, devices, circuits, and systems investigating integrated circuits based on conventional and emerging nanoelectronic and spintronic devices and interconnects. He is the recipient of the IEEE Electron Devices Society (EDS) Paul Rappaport Award for the best paper that appeared in IEEE Transactions on Electron Devices during 2007. He has received an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards at international conferences. Professor Naeemi is also the recipient of 2014 Richard M. Bass/Eta Kappa Nu Outstanding Teacher Award selected by the vote of the ECE senior class and the 2014 ECE Outstanding Junior Faculty Member Award.
Thesis Title: Performance modeling for emerging interconnects in multicore chips
Thesis Title: Ultra Low-Power Interconnects for Subthreshold Circuits
Thesis Title: Interconnects for Post-CMOS Non-Charge Based Switching Devices
Website: https://ece.illinois.edu/directory/profile/rakheja/
Thesis Title: Edge Passivation for Graphene Nanoribbons
Thesis Title: Circuit Modeling of Spintronic Devices: A SPICE Implementation
Thesis Title: Interconnects for Future Technology Generations-Conventional CMOS with Copper/low–κ and Beyond
Thesis Title: Design and Optimization for Chip-to-Chip Interconnect
Thesis Title: Circuit and architecture implications of post-CMOS devices
Website: https://blog.uta.edu/pan/
Thesis Title: Beyond-CMOS Spintronic Logic and Ferroelectric Memory
Thesis Title: Circuit-technology co-optimization for beyond-CMOS Spintronic Devices
Website: https://ece.illinois.edu/about/directory/faculty/kani
Thesis Title: Beyond-CMOS Logic and Interconnect using Collective Phenomena of Magnon, Skyrmion and Plasmon
Website: https://engineering.nd.edu/faculty/sourav-dutta/
Thesis Title: Interconnect Technology Optimization and Design For FinFET Devices and Beyond
Thesis Title: Circuit and Interconnect Design and Benchmarking for Conventional and Emerging Memory Chips
Thesis Title: Circuit Design for Spintronic Devices and Interconnects
Thesis Title: Experimental benchmarking of CVD graphene for memory and interconnect applications
Thesis Title: Physical Models for Ferroelectric Devices
Thesis Title: Physical Models for Antiferromagnetic Beyond CMOS Devices and Circuits
Thesis Title: Circuit Design and Benchmarking for Stacked Logic Devices
Thesis Title: Beyond-CMOS Plasmonic Logic Devices and Circuits
Thesis Title: System-Level Modeling and Design for Interconnects at sub-7nm Technology Nodes
Thesis Title: Vertically integrated end-to-end technology evaluation platform for CMOS and beyond CMOS
Thesis Title: Content Addressable Memory for In-Memory Search to Enable AI Applications
Thesis Title: Physics Based Modeling of Emerging Ferroelectric Devices and Performance Benchmarking of Memory Circuits
